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I had been looking for a "mini Erlang" before, but really CSP's synchronous nature is a much better fit for static allocation. I learned a couple of surprising things doing this. See comments in csp_test.c csp.c csp.h
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Also started porting the ideas to Seq (Haskell->Verilog macro lang) to be able to use on FPGA. I'd like to be able to write in a style that makes it possible to migrate tasks along the stack: FPGA-uC-Linux. Starting to believe this is within reach.
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