I am nerd sniped: how many incorrectly speculated instructions can you get to run in a single shot and how are those conditions engineered? /cc:@tehjh
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Replying to @scarybeasts @tehjh
In my blogpost you see how I engineered it not towatds a max but towards a solid amount of spec exec time
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The key factors are hw, redundant EUs and instruction latency
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the redundant EUs become important because it depends on what you wish to execute. You can probably "execute" a rediculous amount of nops as they 4 of those can be dealt with per clock by one of the renamer stages of the pipeline
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Replying to @anders_fogh @scarybeasts
do you think the number of uops is also limited by reorder buffer size? or do you think the processor can "pre-retire" uops that don't cause memory access or so and free up reorder buffer size?
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(context: reorder buffer size is documented in the optimization manual for Intel stuff, goes up to 192 or something in that ballpark)
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