ARM says Cortex-A53 has a maximum L2 cache of 2 MB. So how can you expect anything more than 2 MB for this design ?
From a historical context, the A53 was designed to compete circa '14/'15. It didn't. Poor tradeoffs then.
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Those tradeoffs, particularly on 28nm, *continue to be poor* for users on moderately priced devices.
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All of this would be less pressing if we were seeing low-core-count A53s w/ maxed-out caches. Those parts aren't being made/sold.
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