...and *that* mattered because costs for SoCs have a lot to do with die sizes...and the easiest thing to cut is cache.
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Consumers don't know to look for L2/L3 cache sizes on the tin. How would you even start to explain cache coherence to a punter?
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So you don't; you sell core counts.
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...and core counts are a lie. DVFS keeps most cores are spun down most of the time. I go into it a tiny bit here:https://www.youtube.com/watch?v=4bZvq3nodf4 …
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But it's really hard to overstate the impact of code and data locality. A bigger cache means you go to main memory less.
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Check out the chart here for context: https://www.anandtech.com/show/9837/snapdragon-820-preview/2 …
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You *badly* want to be in that low/left end of the curve. The easiest way to get that is a bigger cache so more programs do more of the time
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...yet, mostly for cost and marketing reasons, nearly all Android-ecosystem SoCs are CPU poor. Many have tiny L2 and little (if any) L3.
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MEANWHILE IN CUPERTINO: https://en.wikipedia.org/wiki/Apple_A9 https://en.wikipedia.org/wiki/Apple_A10 https://en.wikipedia.org/wiki/Apple_A11
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Replying to @slightlylate
A11 has 8MB L2 but no L3 and smaller L1 than A9 and A10, isn't that a bit weird? I also wonder what the hell is Samsung doing. It makes CPUs
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It's a tradeoff. L2 is clocked higher and better connected (more expensive). Apple's making the Veryron of mobile chips here.
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