-
-
-
Not yet :) Thanks for the link.
-
This looks very promising indeed :) Some Qs: 1. Is production-ready PCE already available and will it run on all SGX hardware? 2. Is production-ready service for PCE cert/CRL publishing already available? 3. Will legal agreement with Intel be required to use either of the above?
-
Also, out of curiosity, when exactly have you published this white paper? It certainly is the missing link which makes your earlier, August DCAP API paper, meaningful now.
-
Also, does this part require a custom Launch Enclave, which will not be the default on “consumer devices”?pic.twitter.com/xvebmcmLJg
End of conversation
New conversation -
-
-
AMD SEV/SME has arbitrary amounts of DRAM, but no integrity protections. Is that sufficient for your threat model?
Thanks. Twitter will use this to make your timeline better. UndoUndo
-
-
-
PXC is like the litecoin..
Thanks. Twitter will use this to make your timeline better. UndoUndo
-
-
-
Imagine letting a big fish go because you love it.
Thanks. Twitter will use this to make your timeline better. UndoUndo
-
-
-
Love is not a lover around here. It corrupts...
Thanks. Twitter will use this to make your timeline better. UndoUndo
-
-
-
Intel discussed trusted I/O at HASP in 2018. https://dl.acm.org/citation.cfm?id=3214295 … and http://caslab.csl.yale.edu/workshops/hasp2018/HASP18_a3-peters_slides.pdf …
Thanks. Twitter will use this to make your timeline better. UndoUndo
-
Loading seems to be taking a while.
Twitter may be over capacity or experiencing a momentary hiccup. Try again or visit Twitter Status for more information.