This is so cool! Is this meant as a development tool? I can't exactly figure out what this is *for*, but I'm an idiot. Is it a way to get, essentially, very fast flash storage for high speed data logging or something?
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When developing open firmware like
@coreboot_org and@LinuxBootOrg, or doing research into early boot security, you end up waiting all the time on the SPI flash chips erase and write cycles. spispy replaces the slow flash with an OSS FPGA and DRAM controller for instant updates.pic.twitter.com/17xMZQfYiU
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I've often wondered if spi flash emulation could enable some interesting TOCTOU attacks.
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@peterbjornx and I demoed a TOCTOU attack against Bootguard (CVE-2019-11098) at@HITBSecConf last month using this sort of technique:https://www.youtube.com/watch?v=hx9MS1_1e2c …
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How do you prevent the flash you are piggybacking from writing to the SPI bus at the same time?
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nm, I'm being dumb, series resistor on /CS or lift pin.
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So it's like those recent Intel server boards and T2 MacBooks which lack a physical SPI but have an emulator instead?
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I once parallel booted 3 zynq chips from an cypress psoc emulating spi. FAEs said it was “technically not impossible”
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can this be dropped into anything that uses flash?
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Čini se da učitavanje traje već neko vrijeme.
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