L1-dcache access in 1 cycle? Which cpu/uarch? I would expect this to be around 4-5 cycles. http://agner.org has Ryzen & Skylake at latency 4.
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Ah, for some reason I was under the impression that L1 was faster than it is. My mistake!
End of conversation
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Is there a dedicated register for the start of the constant pool? Or are you keeping it at some PC relative address?
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