TIL: AArch64 implements “rX = cond ? 1 : 0” as a special case of an insn that does “rX = cond ? rY : rZ + 1”, with rY == rZ == the 0 reg.
Might be! I imagine the AArch64 designers were thinking of something along those lines
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Might be! I imagine the AArch64 designers were thinking of something along those lines