he paused and said "any way you want"
Well, for GPUs it’s easy to see why they moved away from VLIW. Instead of, say, shading 4 pixels at a time with 2 ALUs each, you can see why you can get better utilization by just shading 8 pixels at a time, one pixel per ALU. (Terminology imprecise, but you get the idea)
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Maybe one way to look at the history here is that, for vector processors at least, SIMD beats MIMD (where VLIW is a form of MIMD) in practice.
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Which makes sense—I mean, if you have tons of data parallelism available, why complicate things by adding multiple simultaneous instruction dispatch when you can just decode one instruction and parallelize across lanes
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here's one thing I ran across https://arxiv.org/pdf/1904.05106.pdf …
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one of the things I'm doing spring semester is revamping our undergrad compilers course. I'm looking for ideas about what would make it awesome.
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Well, sure, but it also limits the kinds of problems that work well on GPUs...
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