What I find most funny about ARM moving to allow custom ISA extensions is that in last year's "risc-v basics" smear campaign one of their main arguments against RISC-V was that it'd be unfathomably bad that RISC-V allows custom ISA extensions bc that would lead to fragmentation.
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So far, every non-hobbyist core that I have seen implements multiplication in hardware. E.g., SiFive's smallest core the E20 implements RV32IMC:https://www.sifive.com/cores/e20
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If mul is already de facto required they should just make it officially required, IMO.
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Making lr/sc non-optional is a much more critical fix needed.
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