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pcwalton's profile
Patrick Walton
Patrick Walton
Patrick Walton
@pcwalton

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Patrick Walton

@pcwalton

Research engineer at Mozilla

San Francisco, CA
pcwalton.github.io
Joined November 2009

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    1. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      if you are curious about the details of making a machine that avoids separate flags registers entirely, ask me about it, i worked on a family of such machines for 3.5 years

      1 reply 0 retweets 6 likes
    2. Joe Groff‏ @jckarter 16 Aug 2019
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      Replying to @FioraAeterna @stephentyrone and

      I'd be interested in hearing more In response to Steve's comment, wouldn't you lose the "don't have to encode which register flags are in" benefit once you have more than one? I guess you could still use a smaller operand encoding?

      1 reply 0 retweets 1 like
    3. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @jckarter @stephentyrone and

      yes, you can use a smaller operand encoding. you can also cheat and be like ppc where you use one flags register for regular ops, and then have many to pick between for the ops that *only* output or input from flags registers, e.g. compare, jump conditional, boolops on flags, etc

      2 replies 0 retweets 4 likes
    4. Joe Groff‏ @jckarter 16 Aug 2019
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      Replying to @FioraAeterna @stephentyrone and

      From what I know of ppc, it sounded like that arrangement made it hard for compilers to use the other condition registers, and IIRC not many compiler backends bothered?

      1 reply 0 retweets 1 like
    5. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @jckarter @stephentyrone and

      my personal sense is that the main reasons compiler backends didn't bother is because hardly anyone cared enough about ppc at any point to do so that and because you could win so much by fusing your compares into arithmetic, which forced you into using only cond reg 0

      1 reply 0 retweets 3 likes
    6. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      but i've never worked on a ppc compiler (only a ppc->x86 *recompiler*), so i wouldn't actually know for sure.

      1 reply 0 retweets 2 likes
    7. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      (so my intuition is going based off the ppc code i saw, rather than actually the experience of writing a compiler that would generate it)

      1 reply 0 retweets 2 likes
    8. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      okay, also that and the fact that it required making a compiler actually built around ppc, with concepts like i1 as a legal type and so on. the kind of thing selectionDAG would find a way to stab you in the face for

      1 reply 0 retweets 3 likes
    9. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      .... i also don't know what the PPC ABI for those flag registers was, now that i think about it. i wonder if that hurt things.

      1 reply 0 retweets 1 like
    10. Fiora @ mandatory homestuck!‏ @FioraAeterna 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      actually, that reminds me of one fantastic feature ppc had: the ability to SET WHETHER AN INSTRUCTION UPDATED FLAGS. for basically any instruction. gods imagine if x86 had that, ahahahahaha

      2 replies 0 retweets 9 likes
      Patrick Walton‏ @pcwalton 16 Aug 2019
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      Replying to @FioraAeterna @jckarter and

      AArch64 mostly has that with the S suffix: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/a64_general_alpha.html …

      5:55 PM - 16 Aug 2019
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      • It's an Arm world (virtualized) eddyb, thriving in isolation, Brendan Dolan-Gavitt
      0 replies 0 retweets 3 likes

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