Wow, this is such a cool idea. Translating regular instructions to SIMD instructions in order to run 16 copies of the same program at once, for fuzzing!https://gamozolabs.github.io/fuzzing/2018/10/14/vectorized_emulation.html …
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Maybe for CPUish SIMD it’s helpful to have lots of complications and for GPUish SIMD it’s not worth the silicon?
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Decode die area is probably the main reason I can think of to not do it, yeah. (For x86 anyway.)
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GPUs want fancy thread logic and massive register sets. That might conflict with 512-bit wide registers. Dunno.
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The super wide registers are actually the least interesting part of AVX-512 :)
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And the most problematic.
End of conversation
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