Curious: Why are all these neural network coprocessors (TPUs, Neural Engine, etc.) separate processors instead of just GPUs with better support for 8-bit ints and floats?
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NVIDIA’s “Tensor Cores” are actually just an instruction in their GPUs that performs a small FP16 matrix multiply: https://devblogs.nvidia.com/programming-tensor-cores-cuda-9/ …
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Huh, you’re right!
to NVIDIA.
Now we just need to get this exposed in SPIR-V :)
End of conversation
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