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paxteam's profile
PaX Team
PaX Team
PaX Team
@paxteam

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PaX Team

@paxteam

pax.grsecurity.net
Joined February 2010

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    PaX Team‏ @paxteam Jan 11

    is it just me or did SPECTRE manifest @halvarflake's "weird machine" concept in real hardware? i hope someone's already working on a paper about the computational power of this machine.

    6:30 AM - 11 Jan 2018
    • 10 Likes
    • Christian Blichmann Hany Ragab Jann Horn Jon Williams bryan 🚀 Ilja Sidoroff scriptjunkie Shift Red -q
    4 replies 0 retweets 10 likes
      1. New conversation
      2. Domo-kun‏ @domosauce Jan 24
        Replying to @paxteam @halvarflake

        @paxteam Is the owl still around? ani

        1 reply 0 retweets 0 likes
      3. PaX Team‏ @paxteam Jan 25
        Replying to @domosauce @halvarflake

        maybe, only one way to find out ;)

        0 replies 0 retweets 0 likes
      4. End of conversation
      1. New conversation
      2. Julien Vanegue‏ @jvanegue Jan 11
        Replying to @paxteam @halvarflake

        weird machines were coined by @sergeybratus a little bit at least, no? That's more recent history compared to ASLR :)

        1 reply 0 retweets 2 likes
      3. halvarflake‏ @halvarflake Jan 11
        Replying to @jvanegue @paxteam @sergeybratus

        See my paper - it states that it was Sergey who coined the term.

        2 replies 0 retweets 4 likes
      4. PaX Team‏ @paxteam Jan 11
        Replying to @halvarflake @jvanegue @sergeybratus

        yeah sorry about that, my memory is apparently just a tad bit better than mayhem's ;).

        1 reply 0 retweets 2 likes
      5. Julien Vanegue‏ @jvanegue Jan 11
        Replying to @paxteam @halvarflake @sergeybratus

        maybe you've got yourself a case of neural weird machine? ;)

        1 reply 0 retweets 0 likes
      6. sergey bratus‏ @sergeybratus Jan 11
        Replying to @jvanegue @paxteam @halvarflake

        Don't we all? ;)

        0 replies 0 retweets 1 like
      7. End of conversation
      1. New conversation
      2. Jann Horn‏ @tehjh Jan 19
        Replying to @paxteam @halvarflake

        hmm. does that qualify as a weird state? you could argue that, in the paper's terminology, it all happens in transitory states between sane states, and the CPU never actually moves into a weird state. (IOW: the CPU still behaves according to architectural spec.)

        2 replies 0 retweets 6 likes
      3. halvarflake‏ @halvarflake Jan 20
        Replying to @tehjh @paxteam

        yeah, it is a bit more complicated in this case. the weird state is already entered when the CPU fails to do what the implementor thought/intended it would do; the ifsm for OS would not include kernel/user or user/user side channels?

        1 reply 0 retweets 5 likes
      4. Jann Horn‏ @tehjh Jan 20
        Replying to @halvarflake @paxteam

        but the CPU will always be doing some stuff the implementor didn't specify, which is the whole reason you introduced transitory states. which part of an attack crosses the line from transitory to weird for you? the timing measurement that turns uarch state into arch state?

        3 replies 0 retweets 3 likes
      5. Jon Masters‏ @jonmasters Jan 20
        Replying to @tehjh @halvarflake @paxteam

        I don’t think anything about either attack is a “weird state” nor is it some metastability or not fully enumerated entry in an internal state machine. It’s all precisely behaving according to spec, it’s just leaking information.

        1 reply 0 retweets 4 likes
      6. Jon Masters‏ @jonmasters Jan 20
        Replying to @jonmasters @tehjh and

        Today its D cache and branch predictors, tomorrow it will be attacks against other parts of the machine. We have seen even papers showing how instruction sequences can damage machine life due to internal pipeline transitions they can force. There are so many possible vectors.

        3 replies 3 retweets 11 likes
      7. Jon Masters‏ @jonmasters Jan 20
        Replying to @jonmasters @tehjh and

        I am waiting for differential timing analysis of pipelines (not the caches) to infer what instructions are in flight - @lavados started down this path with his blog in July which initially thought about the meltdown problem in far more levels of sophistication than required here

        2 replies 2 retweets 1 like
      8. Jon Masters‏ @jonmasters Jan 20
        Replying to @jonmasters @tehjh and

        Oh and I doubt just removing high precision timers will do it. If you can have a high enough bandwidth link between two cores (via the cache) you can time a counting loop on a second core in lieu of having high precision time on the other. Hope android considered that case.

        2 replies 5 retweets 5 likes
      9. Jon Masters‏ @jonmasters Jan 20
        Replying to @jonmasters @tehjh and

        But you already thought of that didn’t you @lavados ? ;) you must have...

        1 reply 0 retweets 1 like
      10. 1 more reply
      1. New conversation
      2. Jann Horn‏ @tehjh Jan 19
        Replying to @paxteam @halvarflake

        for v2, afaics how much power you get in the end should mostly depend on what gadgets you have and how much register/memory control you have? mostly like normal attacks with gadgets, except you get more control over indirect calls, some things don't work, and there's a time limit

        1 reply 1 retweet 2 likes
      3. Jann Horn‏ @tehjh Jan 19
        Replying to @tehjh @paxteam @halvarflake

        would be interesting to see though how well classic ROP works in there, considering that all the returns would probably be mispredicted

        0 replies 0 retweets 1 like
      4. End of conversation

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