Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

I disassembled all libraries and binaries in all riscv64 debian packages and counted how often each individual instruction is used: http://svn.clifford.at/handicraft/2018/rvinsfreq/combined.txt … (The most frequently used instruction is "http://c.mv ", followed by "auipc", "addi", and "jal".)

macro-op fusion pattern matching would be useful. i.e. pairs where the temporary in the first instruction overwrites the second. However there is a chicken and egg problem because to properly exploit macro-op fusion, the compiler needs rules to emit the pairs.

What’s worse is that the instruction scheduling you should do for simple macro-op fusion is the exact *opposite* of what you should do for a simple in-order superscalar processor. I.e. deliberately put dependent instructions together instead of deliberately separating them.

There is also a debate as to whether macro-op fusion pairs should be represented by assembler pseudo ops or whether they are handled with macro-op fusion aware instruction selection and instruction scheduling.