I disassembled all libraries and binaries in all riscv64 debian packages and counted how often each individual instruction is used: http://svn.clifford.at/handicraft/2018/rvinsfreq/combined.txt … (The most frequently used instruction is "http://c.mv ", followed by "auipc", "addi", and "jal".)
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Replying to @oe1cxw
macro-op fusion pattern matching would be useful. i.e. pairs where the temporary in the first instruction overwrites the second. However there is a chicken and egg problem because to properly exploit macro-op fusion, the compiler needs rules to emit the pairs.
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Replying to @contramork @oe1cxw
What’s worse is that the instruction scheduling you should do for simple macro-op fusion is the exact *opposite* of what you should do for a simple in-order superscalar processor. I.e. deliberately put dependent instructions together instead of deliberately separating them.
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Replying to @BruceHoult @oe1cxw
Yes that’s true. To find macro-op fusion pairs in existing code we’d need to find dependent pairs that overwrite a temporary potentially separated by other instructions. There would need to be micro-arch options in the compiler to optimise for processors with macro-op fusion.
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That's what I did in the analysis I did last year on fusion options for neg and not: http://svn.clifford.at/handicraft/2017/bitcode/notneg.py … uses some heuristics because it does not follow branches, and it keeps track of branch targets to avoid false positives that span basic blocks.
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