Random crazy idea: Hardware demoscene. How small can you make a piece of RTL that does something cool? We could have "1K gate demos" etc.
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I'd probably go with number of tiles or possibly config frames on Artix 7, with categories something along line of SLICEL only, SLICEL+SLICEM and "free for all" (DSP+BlockRAM). Figuring out the rules and how to evaluate entries is a large part of the effort I think?
Number of tiles and number of frames are *very* different metrics! A bram column contains 28+128=156 frames and 10 tiles. A logic column contains 36 frames and 50 tiles. So either a bram column is 4x *more* expensive than logic (frames) or 5x *less* expensive (tiles).
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Related: In the free-for-all category, have points for "worst abuse of hard IP". Example: using a GP_COUNT8 with count=1 as a R-S FF (RST=R, CLK=S) when you run out of flipflops
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