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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    1. Electronut Labs‏ @electronutLabs 26 Mar 2018
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      Question from an FPGA newbie - can code running in a PicoRV32 on an FPGA like iCE40-HX-4K be debugged via JTAG? @oe1cxw Thanks!

      2 replies 0 retweets 1 like
    2. Rohit Singh‏ @RohitK_Singh 26 Mar 2018
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      Replying to @electronutLabs @oe1cxw

      IIRC PicoRV32 doesn't have a debug unit (yet, but open source == one can always add themselves!). @oe1cxw might be able to answer better.

      1 reply 0 retweets 2 likes
    3. Rohit Singh‏ @RohitK_Singh 27 Mar 2018
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      Replying to @RohitK_Singh @electronutLabs @oe1cxw

      Err...It looks like it does have debug as well as trace capability too -> https://github.com/cliffordwolf/picorv32/blob/master/picorv32.v#L141 …

      1 reply 0 retweets 1 like
    4. Electronut Labs‏ @electronutLabs 27 Mar 2018
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      Replying to @RohitK_Singh @oe1cxw

      When you say debug, is it via trace statements, or is it possible to break in the code, etc. Any link to an example debug session? Thanks!

      1 reply 0 retweets 0 likes
    5. Rohit Singh‏ @RohitK_Singh 27 Mar 2018
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      Replying to @electronutLabs @oe1cxw

      I think Clifford would be able to answer it much better. Apart from CPU having debug and trace support, the SoC (picosoc or custom) should also have a debug unit capable of controlling and interfacing the CPU.

      1 reply 0 retweets 1 like
    6. Electronut Labs‏ @electronutLabs 27 Mar 2018
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      Replying to @RohitK_Singh @oe1cxw

      @ntavish see thead

      1 reply 0 retweets 0 likes
      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 27 Mar 2018
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      Replying to @electronutLabs @RohitK_Singh @ntavish

      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩 Retweeted Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

      https://twitter.com/oe1cxw/status/978599298051997696?s=19 …

      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩 added,

      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩 @oe1cxw
      Replying to @electronutLabs
      Picorv32 has a trace port, but not via jtag (no jtag on iCE40 either) and not compatible with risc-v debug spec. Also no hardware debug support (besides trap instruction), but it should be fairly easy to write a gdb stub that would allow step debugging of non-irq code.
      4:47 AM - 27 Mar 2018
      • 4 Likes
      • Tavish Electronut Labs Antti Antinoja Rohit Singh
      1 reply 0 retweets 4 likes
        1. Rohit Singh‏ @RohitK_Singh 27 Mar 2018
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          Replying to @oe1cxw @electronutLabs @ntavish

          Awesome, Thanks! It clears up things for me too! :)

          0 replies 0 retweets 2 likes
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