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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    1. Electronut Labs‏ @electronutLabs 26 Mar 2018
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      Question from an FPGA newbie - can code running in a PicoRV32 on an FPGA like iCE40-HX-4K be debugged via JTAG? @oe1cxw Thanks!

      2 replies 0 retweets 1 like
      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 27 Mar 2018
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      Replying to @electronutLabs

      Picorv32 has a trace port, but not via jtag (no jtag on iCE40 either) and not compatible with risc-v debug spec. Also no hardware debug support (besides trap instruction), but it should be fairly easy to write a gdb stub that would allow step debugging of non-irq code.

      4:47 AM - 27 Mar 2018
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      • 4 Likes
      • David Craven Electronut Labs Adrian Pistol (VIFI @ #rC3) Rohit Singh
      0 replies 1 retweet 4 likes

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