Do you know about the SVA unit test framework from @amiq_eda ?
https://github.com/amiq-consulting/svaunit …
Might save you some time... (Disclaimer: I work for a company that's broadly a competitor to AMIQ, but I think they're a cool outfit.)
Current status: Fix typo in property (1 min) → rerun verification (50 min) → fix typo in property (3 min) → rerun verification (90 min) → fix typo in property (1 min) → rerun verification (45 min) → ⋯
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I resemble this, but time to verification failure is currently 1/10 of your times.
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I recommend adding more bugs so you can get a bit more parallelism in your process.
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I am always talking about importance of type safety and tooling support with real-time error highlight.. people call me mad and keep writing scripts :)
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Not that kind of typos. Bitmaps with properties of physical memory regions and I kept setting the wrong bits..
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Aha so true..
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Cacheable somehow?
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No because I change the design so it's a new SMT problem each time.
End of conversation
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