Assertions Whiningpic.twitter.com/1rQmPlJjYg
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Is this is a book? What's its title?
SystemVerilog Assertions and Functional Coverage; Ashok B. Mehta; ISBN 978-1-4614-7323-7http://www.springer.com/fr/book/9781461473237 …
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Do your tools support SVA or a subset?
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Only via verific (commercial SystemVerilog/VHDL parser library). It's included in our commercial
@symbiotic_eda edition of Yosys. The regular version of Yosys only supports immediate assert/assume/cover statements, not SVA properties.
End of conversation
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