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Here's the routing information that gets output. I believe this is the information needed to document the ECP5 FPGA routing. Now I need to understand the routing->bitstream correlation algorithm done by @oe1cxw.pic.twitter.com/2o8udddl5B
The algorithm is implemented in the "segmatch" tool in prjxray. Usage example:pic.twitter.com/yBTlNIDFzK
Nice. I’ll have to take a closer look tonight to understand the input format.
The "seg <name>" lines start a new "segment" section. You can for example create one segment per tile (thus create many segments from one bitstream), or you can treat the whole chip as one large segment (and analyse many bitstream files to get more than one segment). 1/
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