The screenshot is from the Lattice iCE40UP dev board schematic. Because "do as they do" is the only safe thing left when the vendor is not really writing proper documentation for their chips.
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What the... Those LED_{RED,GREEN,BLUE} signals are connect to programmable current sinks. So why the resistors?! Extra diodes to make sure to drop below the Vmax for the (open-drain) sinks? Maybe. I was not able to find a Vmax rating for it bc the iCE40UP5K datasheet is a farce..pic.twitter.com/ohxImWdYw5
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I think I can make sense of this. The extra diodes plus LEDs should drop 5V below VCC_IO clamp diodes on FPGA. As far as resistors, I thought they just had large 24mA (non current limiting) N-Channels for driving LEDs with up to 24mA continuously. So, without R's they'd burn up.
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They can be configured either as open drain IO with an "unlimited" Nch mosfet or as a constant current sink programmable up to 24mA with 2/4mA steps
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It's out of spec, but I know at least one person drove ice40 pins directly with 5V for over a day w/ no adverse effects. So I'm guessing the resistors are just there to control the current due to diode coefficient variations.
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"Officially" as attached the intended operating supply range is 3.8 to 4.3V power and 3.6V on the pin, but I suspect the voltage drop of the LED is sufficient that 5V and no R or D would be fine.pic.twitter.com/Hh4RqlJVkf
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Meh, it's consistent with the line: If you pull high dV it's not a challenge to Xilinx or Altera driver parm and guardring hyperlink salad, but a way to propogate err or RST blockwise. Though RF or photon LED saturation can also offer blue smoke mode.
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Are these current sink pins reconfigureable as standard inputs? I.e. safety net for user stupidity on a development board?
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