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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    1. Fiora‏ @FioraAeterna 4 Jan 2018
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      Replying to @theJingster

      i wrote this before the names/distinctions were out, but -- meltdown: using this technique to break VM protection (e.g. steal kernel memory)

      1 reply 1 retweet 4 likes
    2. Fiora‏ @FioraAeterna 4 Jan 2018
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      Replying to @FioraAeterna @theJingster

      spectre: harder to exploit, more general, far harder to mitigate: using this technique to steal data *within* a program, e.g. a website's javascript stealing other data in the browser

      2 replies 1 retweet 6 likes
    3. Fiora‏ @FioraAeterna 4 Jan 2018
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      Replying to @FioraAeterna @theJingster

      the distinction here is that spectre *doesn't violate memory protections* and largely involves abusing existing code paths (ROP-style).

      1 reply 0 retweets 5 likes
    4. Jing Yao‏ @theJingster 4 Jan 2018
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      Replying to @FioraAeterna

      I see. That’s more clear. Thanks! I am still a bit confused why spectre can’t be patched w/out hardware architecture changes while meltdown can. These proposed hardware changes basically mean adding security checks prior to speculation right? So slower speeds vs. previous gen?

      1 reply 0 retweets 0 likes
    5. Fiora‏ @FioraAeterna 4 Jan 2018
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      Replying to @theJingster

      meltdown: unmap kernel memory before returning to userspace, thereby making speculation impossible. only possible to begin with on chips that allow speculation across privilege boundaries

      1 reply 1 retweet 3 likes
    6. Fiora‏ @FioraAeterna 4 Jan 2018
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      Replying to @FioraAeterna @theJingster

      spectre: there's no memory protection involved so good fxcking luck

      1 reply 1 retweet 6 likes
    7. Jing Yao‏ @theJingster 4 Jan 2018
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      Replying to @FioraAeterna

      💡 Wow. So what does this mean for cpu architecture?

      1 reply 0 retweets 1 like
    8. Fiora‏ @FioraAeterna 4 Jan 2018
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      Replying to @theJingster

      i think the answer is "nobody knows yet"

      1 reply 0 retweets 2 likes
    9. Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 5 Jan 2018
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      Replying to @FioraAeterna @theJingster

      Just my 2c: Meltdown: Split supervisor/user pagetables seems to be the most obvious fix if changing the ISA is an option (this might be the direction RISC-V is going). Spectre: Run the JIT in a separate process that has no secret data mapped. That's a big SW change of course.

      1 reply 0 retweets 4 likes
    10. Phil Dennis-Jordan  🔴 🥷 🐬‏ @pmjordan 5 Jan 2018
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      Replying to @oe1cxw @FioraAeterna @theJingster

      I wonder if this'll lead to weird OS features such as "restricted threads" which don't share the full page table with their parent process?

      1 reply 0 retweets 2 likes
      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 5 Jan 2018
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      Replying to @pmjordan @FioraAeterna @theJingster

      I spend a lot of time thinking about that yesterday, but just having separate processes and then using traditional IPC to be explicit about the visible stuff seems much saner than everything else I was able to come up with..

      8:12 AM - 5 Jan 2018
      1 reply 0 retweets 0 likes
        1. Phil Dennis-Jordan  🔴 🥷 🐬‏ @pmjordan 5 Jan 2018
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          Replying to @oe1cxw @FioraAeterna @theJingster

          Yeah, I'm just wondering if retrofitting IPC onto existing software is going to be in any way practical.

          0 replies 0 retweets 1 like
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