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i think the answer is "nobody knows yet"
Just my 2c: Meltdown: Split supervisor/user pagetables seems to be the most obvious fix if changing the ISA is an option (this might be the direction RISC-V is going). Spectre: Run the JIT in a separate process that has no secret data mapped. That's a big SW change of course.
I wonder if this'll lead to weird OS features such as "restricted threads" which don't share the full page table with their parent process?
I spend a lot of time thinking about that yesterday, but just having separate processes and then using traditional IPC to be explicit about the visible stuff seems much saner than everything else I was able to come up with..
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Wow.
So what does this mean for cpu architecture?
