Creating spec for an iCE40UP5K development board. Please reply with your feedback: Anything important missing from that spec?pic.twitter.com/x4TKdVuKyd
-
IMO you can't have too much USB bandwidth as FPGA such a useful interface translator; higher speed=more uses. Vote for (perhaps w/simple board mod) allowing fastest possible FTDI FIFO modes pls
-
-
FTDI async fifo mode a bit meh; https://goo.gl/QaCZjS 8MB/sec async vs 40MB/sec sync [guess ~25-30MB/sec sustained in real world] ...but two more lines reqd for sync mode... [Sorry to nitpick, I know you can't please everyone ;-) ]
-
We looked at it and sync mode would be hard to implement for various reasons. One is that sync is only available on the A port, not the B port. But using port A for data and B for programming would break programmer compatibility with Lattice dev boards, so we can't do it.
- Show replies
New conversation -
Loading seems to be taking a while.
Twitter may be over capacity or experiencing a momentary hiccup. Try again or visit Twitter Status for more information.