Can I emphasise what a tour-de-force this is? Wonderful!!!
(FOSS bitstream synthesis for 7-Series Xilinx #FPGA)https://twitter.com/oe1cxw/status/943857881270685696 …
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OK. I was overenthusiastic. But past RE attempts on large FPGAs were rare and obscure (and pretty much lost). This was such a good use of massive computing.
We expect to have VPR running and generating bitstreams for partial reconfiguration soonish. We also hope to have some kind of pessimistic timing analysis up and running withing the next ~6 months.
