Apparently all RISC-V processors are built by SiFive and aren't relevant to machine learning, only for auxiliary control tasks. 
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Listening to a panel discussion at SJSU about AI and deep learning. Suddenly the whole panel starts talking about RISC-V, but apparently none of them even seem to understand that RISC-V isn't an open source processor.
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Can you elaborate on your point ? - aren't there multiple RISC-V implementations ? Or are you drawing a distinction between open ISA and open impls
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RISC-V is an open ISA. It is flexible (32/64 bits, extensions for various application domains). There are many implementations some open source, some not. The people on this panel seem to think it is one open source processor.
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I think RISC-V is a pretty cool CPU core. Ti number crunches well and doesn't afraid of anything.
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