Finally had some time to synthesize and simulate my tiny microcoded rv32 CPU implementation. It synthesizes, and it is showing signs of life! Current synthesis results show it using about 500 LUT4s.pic.twitter.com/k5cv4vjnAo
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It runs right up until the currently unsupported RDCYCLE instruction is called. Also, thanks again to
@oe1cxw because I am using the same interfaces as his picorv32 cpu and so I've been able to reuse all of his collateral...including the testbench
pic.twitter.com/5A5K3fOEQy
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That's awesome! How many cycles per instruction? Is the code online somewhere?
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It's about 9 or 10 cycles per instruction. Pretty slow, but clock speed and size should help make up for that. Synplify Pro gets it to 40MHz and icestorm gets it to 20MHz on a iCE40LP8K part. Source code isn't online yet, I'll see if I can't get it on Github soon.
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Once I start optimizing the design I should be able to get the clock speed much higher at the potential expense of a couple more cycles per instruction.
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