Anybody want to try reproducing a Vivado simulator bug?https://forums.xilinx.com/t5/Simulation-and-Verification/Reproducible-segfault-in-XSIM-with-malformed-function-call/td-p/811385 …
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@oe1cxw Do you think this is a Verific bug (based on the backtrace in the post)? IOW, should Verific have caught this and reported the syntax error, or is that on the host app (Vivado)? Not familiar with their API.
I'll test it later today. But Vivado is only using the Verific parser afaik. It has its elaborator. So it might be that this is a Vivado-only bug.
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Pretty sure the segfault is vivado. But should Verific have allowed the bugged AST to get to this point, or should it have thrown an error earlier in the parser?
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Verific actually accepts that input file. (Produces no error.) Not sure if that's because I'm running Verific in synthesis mode (where it ignores $display statements).
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Given Verific is also the front end for Quartus, it should be possible to figure that out.
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