Asynchronous resets are bad design practice. Reset your flops synchronously or not at all.https://twitter.com/iowahawkblog/status/932309842123022336 …
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You could probably exclude sync reset tree as the false / multi path, but I don't know how to do it safely.
There are a few ways to do that. Would need to look up the exact sdc syntax, but it is possible. If you are worried about getting it right in combined STA, you can always re-run STA with 2nd set of rules with everything in slow clock domain.
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But if you manage to cleanly switch between different clock speeds without a risk of clock glitches, and manage to verify statically that you did that correctly, then setting up STA for slower constraints on reset edges is easy in comparison.
Thanks. Twitter will use this to make your timeline better. UndoUndo
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The trouble is about shipping soft IP with constrains to the customer, that will integrate it with bigger IP, that then goes to SoC integration team that will hate you for 3-4 layers of STA constrains.
Thanks. Twitter will use this to make your timeline better. UndoUndo
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