Asynchronous resets are bad design practice. Reset your flops synchronously or not at all.https://twitter.com/iowahawkblog/status/932309842123022336 …
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WHY do you think that Asynchronous resets are bad design practice?
Because they are incredibly hard to verify. Both wrt timing and formal. They require glitch free driver logic which practically nobody who uses them cares to verify. And they provide little to no advantages.
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The only argument that can be made for async reset is that it requires a bit less area in ASICs. But most people who make this argument reset far more flops than necessary. So if area is an issue: Only reset the flops that actually need resetting.
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Area is an issue for most commercial ASIC and SoC designs. Area = Money
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