Also: Why does this PIP even exist in hardware? The only thing that can be done with it is feedback a LUT output directly back into the LUT. (This PIP cannot be used with the LUT output passed thru any of the FFs.) Maybe for LUT6_2? Idk..
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I only seem to deal with Tcl every few years and when I do it always seems painful. I wish these vendors would adopt Python as an alternative to Tcl.
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Yes. Python would be awesome. Unfortunately "modern scripting language" still means Perl in EDA world. I might actually prefer TCL..
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I do find it amusing you think ISE is so much worse :).
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It absolutely is. How would you do something like the thing I just posted with ISE? You could use XDL of course, but how would you query the physical structure of the chip so you'd know what to put in the XDL file?
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All that just for a darn non-inverting loop? Silly question: why not just Verilog? Does it not map to the same?
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I need to query the device database to figure out where to LUT must go and what input to use. Once I have this information I could as well use Verilog to create the cell and net, but that wouldn't make it any simpler imo (and would be much slower).
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