What's a clock domain crossing? Need some simple straightforward solutions for CDCs? See http://zipcpu.com/blog/2017/10/20/cdc.html …
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You can sometimes safely cross between "posedge of clk_foo" and "negedge of clk_foo" because they're in-phase. Too much for a beginner tut?
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Perhaps the article should begin with an explanation of setup/hold times and metastability?
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the article by Clifford Cummings linked at the end is an excellent resource. All RTL designers should read that one
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All RTL designers should read all Clifford Cummings whitepapers. They are really good.
6:02 AM - 21 Oct 2017
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