You’re saying there is a bug in the spec they are verifying against?
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Replying to @alastair_d_reid @whitequark
Yes. But they aren't verifying their spec against anything (yet). Their primary focus is on proofing abstract properties of the ISA..
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And that is also very important of course, but I think the first step should be proving that the spec actually matches the implementation.
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Replying to @oe1cxw @whitequark
But but but... all the hard bits of specs and of processors are in exception handling. If you skip that bit, you’re doing the easy 10%
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Replying to @alastair_d_reid @whitequark
This is the MIT Spec: https://github.com/mit-plv/riscv-semantics … Contains parser for subset of Haskell with >200 shift-reduce (and some r-r) conflicts.
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Replying to @oe1cxw @whitequark
Why would you write spec in a language that many programmer find obscure and hard (for humans) to parse???
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Replying to @alastair_d_reid @whitequark
I asked exactly that question in the workgroup. Answer: Target audience is formal people, for them Haskell is easy. (paraphrased)
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Replying to @oe1cxw @whitequark
Target audience should include asm programmers, people writing tests, people writing compilers and OS, hardware designers, ...
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Replying to @alastair_d_reid @whitequark
Yep. I didn't propose my Verilog spec as the official spec for two reasons: (1) I thought it was too domain specific and
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Replying to @oe1cxw @whitequark
I think that having multiple users is so important that I think ISA specs should be written in a DSL (not Verilog, Coq, HOL, ...).
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A DSL would be fine with me if there is a golden reference translater into something verify able (SMT2 would be fine and probably easy).
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Replying to @oe1cxw @whitequark
I translate ASL to C++, Verilog, SMT2 and a new ACL2 backend is about to start. The REMS group translate it to SAIL then to HOL. DSLs FTW!
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