@johnregehr I just watched your 2014 talk on Souper at UW on YouTube. Fascinating how similar it is (was at the time) to "freduce" in Yosys.
Fig. 2 looks exactly like the procedure I hinted at. (S is set of in-out samples.) I'll read the whole thing tomorrow.. Thanks for the ptr!
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Consider this: A circuit with 32 inputs and 32 outputs but no operators, just direct connections between in- and output bits.
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That's already a search space of 32^32 configurations (there is no requirement to use all inputs). And you'd need at least 32 samples to
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