@johnregehr I just watched your 2014 talk on Souper at UW on YouTube. Fascinating how similar it is (was at the time) to "freduce" in Yosys.
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Because in hardware you can wire any bit anywhere it must compare bits, not words, and there are n^2/2 pairs..
I wrote it in 2013, so I don't have a very fresh memory from writing it, but the basic idea is this: 1/ (oh I wish I already had 280 :)
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I do not consider things from previous cycles, so flip-flops are essentially my "stop condition".
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So I have a couple of DAGs. I throw random inputs at them and see which behave the same. Then I mark then as potentially the same node.
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