You should blog it for later reuse.
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I usually post self-answered questions (or add to my existing answers) on stack overflow:https://stackoverflow.com/questions/45172834/how-to-run-post-synthesis-simulation-with-the-icestorm-ice40-fpga-flow …
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you should not spend a second of your time doing that
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answers on stack overflow or blog reach more people
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That's why I also try to post the same information on SO. For example: https://stackoverflow.com/questions/45172834/how-to-run-post-synthesis-simulation-with-the-icestorm-ice40-fpga-flow … But the ppl sending emails don't check SO..
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and if your examples are anti-patterns, then it might save time if you updated them to be positive patterns
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I don't think I use that pattern in any of my "examples". But I think I might have used it in some of my open source real-world projects.
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is it possible to detect and warn about clock edges at timestamp 0?
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Maybe, but that's a simulator issue and has nothing to do with any of my tools. (Another distinction that ppl sending me mails don't make :)
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What? Is the ordering between declaring a reg and always blocks undefined? Sounds fishy, but haven't checked LRM
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I know that modelsim has the borderline bug behavior of creating a new implicit reg/wire if the real declaration is below
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