TFW someone reports a "Yosys bug" and it turns out it is a 100 MHz design and they did not even bother running timing analysis.
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that rough, wow.
Here is an example that actually started on github: https://github.com/cliffordwolf/icestorm/issues/36 … he later sent emails to me and people I work with.
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He sent various code snippets but never a complete example and continuously complained to people I work with that I am unfairly ignoring him
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Months later I got a complete example: Turns out he was trying to generate a 250 MHz LVDS signal and he ignored timing analysis results.
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