Updated the timing evaluation in the PicoRV32 README to use data from Vivado 2017.2 and added UltraScale+ devices. https://github.com/cliffordwolf/picorv32#evaluation-timing-and-utilization-on-xilinx-7-series-fpgas …pic.twitter.com/nt2PWLr1bQ
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Seems like only UltraScales can run faster while the rest is slower. That much difference in routing? (and the list is smaller
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Yeah. It takes ages to generate that table. So I removed speed grade -1 and artix devices. Probably least interesting for fast designs.
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I'll see if I can generate a table for Artix since it makes sense for a small core to run also run on a small device ;)
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Actually, the fabric of Artix is different that that of the Kintex/Virtex AFAIK. That probably has a bigger impact on max frequency.
End of conversation
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