very excite that I have sort of the correct power brick (19V 3.8A but supposed to have 18V 3.48A 
) now I can play with this novena's FPGApic.twitter.com/AERlWeJaic
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I think in the long run Verilog will have a more "assembly like" role in most flows. Verilog is absolutely sufficient for that role.
Most design work will soon be done in higher level languages anyways (like chisel, open cl, whatever is good for the domain).
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I doubt it. HL HW deign has been the coming thing for decades. Did my thesis on it. Verilog and VHDL is what gets stuff done
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A lot of the design work I do is with HLS, riscv-v rocket (and boom) are in chisel. At least in my bubble it's already here.
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