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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    1. OSS FPGA & ASIC EDA tools‏ @ico_TC 22 Jun 2017
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      Darpa no longer will fund research in chip synthesis as there is already OSS Yosys funded and developed by @oe1cxw

      1 reply 4 retweets 9 likes
    2. Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 22 Jun 2017
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      Replying to @ico_TC

      *logic synthesis They will fund work on layout synthesis, as this is the part not covered by Yosys and ABC.

      1 reply 2 retweets 3 likes
    3. Dimitar Tomov‏ @tomov_eu 22 Jun 2017
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      Replying to @oe1cxw @ico_TC

      Great news ! Can you provide some source? Would love to share this news with Video :-)

      1 reply 1 retweet 0 likes
      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 22 Jun 2017
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      Replying to @tomov_eu @ico_TC

      Source is in-person discussions at DAC.

      2:54 PM - 22 Jun 2017
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      • Dimitar Tomov
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        1. Dimitar Tomov‏ @tomov_eu 22 Jun 2017
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          Replying to @oe1cxw @ico_TC

          but surely there will be an official announcement or such ? :-)

          0 replies 0 retweets 0 likes
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