Silly "Retro tech" idea of the day: System that takes HDL, sythesises to NAND gates, autoroutes a PCB full of 74HC00's
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I did synthesis of structural Verilog to a KiCAD netlist that was then manually routed. Behavioral would be a fun project though...
Well, synthesis of behavioral code to NAND gates is trivial in Yosys. Don't know about KiCad autoplace and autoroute..
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You'd still have to pack multiple discrete gates into a 74xx primitive as well. That plus PAR would be interesting.
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Yes. But packing is very easy if someone else is responsible for writing a PAR tool that has to implement the packed design. :)
End of conversation
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