This example is an approximately half-full (hx8k) FPGA:pic.twitter.com/xUlcbYmU1o
Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.
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This example is an approximately half-full (hx8k) FPGA:pic.twitter.com/xUlcbYmU1o
That shows (predictably) the limitations of RLE quite clearly, maybe other methods can improve with higher gate counts..
J1a is pretty much as tight as it gets (hx1k). Still 33% space savings. ("gzip -9" achieves 42% space savings.)pic.twitter.com/7rTHUssgT7
Agree, 33% is a good start. Could you elaborate more on the algorithm your are using?
I am storing the distances between ones. I'm using a simple Huffman code to use fewer bits for small distances.
yes, this way you are winning allot on Zero and loosing on Ones. Here is 128'b1 example:pic.twitter.com/GxGyXZxqym
Improved version: http://svn.clifford.at/handicraft/2016/ice40compr … worst case is now -15%.pic.twitter.com/p9SN6ny1Hi
Great! Can you compile it for bare-metal ARM? What is the code size?
I now wrote a pure C version of the uncompressor. Less than 200 bytes code size on ARM thumb. http://svn.clifford.at/handicraft/2016/ice40compr/ice40uncompr.c …
Hey that's nice and simple
Changed the encoding slightly. Now worst case is at -14%, both example bins improved by about half a percentage point.
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