Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

Just finished my latest blog post on IP-XACT http://olofkindgren.blogspot.com/2016/11/ip-xact-good-bad-and-outright-madness.html …

I actually think it is an advantage that different vendors use different VLNVs for "standard" buses. 1/

This forces you to create an interface abstractor and double-check the bus definitions used by both vendors. 2/

Sometimes they e.g. differ in default values for when a signal is not driven. Hard to troubleshoot and fix otherwise.. 3/3

Well, that's a bug in the IP-XACT file then, and you will see it in the generated verilog

Usually you don't manually check generated verilog, not on that level. You'd see that the generated system doesn't work.

And how would you fix it: You can only use the vendor A definition and break the vendor B core or vice versa.

You'd have to manually change the cores of one vendor to use a different bus VNLV and create an interface abstractor to fix.