Maybe https://www.edaplayground.com can help
Is there any free or free-as-in-free-beer Verilog sim that supports SVA properties? I need a reference implementation to check against..
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you might want to check out https://www.edaplayground.com/
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Hace you looked at Verilator http://www.veripool.org/wiki/verilator
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checked again with current git head. verilator doesn't seem to support what I need. Code example: http://www.edaplayground.com/x/2Z2E
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the Webpack license for Xilinx Vivado Simulator is a nice free-as-in-free-beer alternative -- it supports mixed Vlog, VHDL and SVlog
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I don't know if you would like - but I can volunteer to run it offline if that helps (with commercial sim that's )
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Thanks! I'll contact you regarding this if I don't have another solution by the time I have something to test. (few months at least)
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might want to give a shot to the modelsim starter edition available from altera's website?
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