@oe1cxw This might be a stupid q, but in yosys how did you get ahold of SiliconBlue's primitive library (in Verilog form)?
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Fixed (kinda... now it's always high)... I forgot to add a clock signal, since inputs are registered by default.
You should always at least specify PIN_TYPE when instantiating SB_IO. Don't rely on defaults.
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Are defaults prone to changing (I'm not questioning your judgment. I'm changing it now. Just wondering)? >>
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In general, I try not to mess with settings I don't need to change :P. I'm known for crashing things when I sneeze wrong.
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