@oe1cxw This might be a stupid q, but in yosys how did you get ahold of SiliconBlue's primitive library (in Verilog form)?
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(Context: I'm trying to get yosys to infer a pullup on IceStick's GPIO and instantiating an SB_IO seems to be doing nothing :(...)
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Fixed (kinda... now it's always high)... I forgot to add a clock signal, since inputs are registered by default.
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You should always at least specify PIN_TYPE when instantiating SB_IO. Don't rely on defaults.
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