Anyone up for extending the verilog output in objcopy to support 32/64-bit vectors? Currently everyone is doing their own version @antgreen
@OlofKindgren @antgreen This! I already wrote too many tiny python scripts to convert the width of "objcopy -O verilog" output.
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@oe1cxw@OlofKindgren@antgreen it would be easy to update objcopy to set the width based on the arch (riscv32 vs risc64) -
@jameyhicks@oe1cxw@antgreen Yeah, that's what I'm thinking as well. Might be nice however to be able to set it explicitly too - Show replies
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@oe1cxw@OlofKindgren@antgreen also could add "verilog32" and "verilog64" targetsThanks. Twitter will use this to make your timeline better. UndoUndo
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