Idea: Add lots of tiny CPUs, say Cortex-M0, to FPGA fabric as hard IP. Quick estimate says 2x M0 are ~= size of one RAMB18 on same process
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@oe1cxw@azonenberg Yes, I meant gates. Still nicely within "aww, it's so cute" territory.
@cr1901 @azonenberg PicoRV32 in smallest config, mapped with Yosys to a standard CMOS cell library: 4522 gates and 953 flip-flops.
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@oe1cxw@azonenberg I wonder how a 6502 core would do (I like those as a compromise between Picoblaze and a full-blown RISC CPU)? -
@cr1901@azonenberg The 6502 had 3510 NMOS transistors and 1018 pullup resistors. - Show replies
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